15/11/2020

Certified and Efficient Instruction Scheduling: Application to Interlocked VLIW Processors

Cyril Six, Sylvain Boulmé, David Monniaux

Keywords: Formal verification of compiler optimizations, the Coq proof assistant, Hash-consing, Symbolic execution, Instruction-level parallelism

Abstract: CompCert is a moderately optimizing C compiler with a formal, machine-checked, proof of correctness: after successful compilation, the assembly code has a behavior faithful to the source code. Previously, it only supported target instruction sets with sequential semantics, and did not attempt reordering instructions for optimization. We present here a CompCert backend for a VLIW core (i.e. with explicit parallelism at the instruction level), the first CompCert backend providing scalable and efficient instruction scheduling. Furthermore, its highly modular implementation can be easily adapted to other VLIW or non-VLIW pipelined processors.

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